When does a negative level triggered flip-flop in Digital Electronics changes its state?

Asked In Exam: BPSC TRE 3.0

Options

  • A. When the clock is Negative
  • B. When the clock is Positive
  • C. When the inputs are all zero
  • D. More than one of the above
  • E. None of the above

Correct Answer (Detailed Explanation is Below)

A. When the clock is Negative

Detailed Explanation

Explanation

A negative level triggered flip-flop changes its state when the clock signal is at a LOW level (logic 0).

  • Negative level (LOW) → Flip-flop responds and can change state ✔

  • Positive level (HIGH) → No change ✖

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BPSC Tre 4.0 Digtial Electronics Quiz Practice Set

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