What is the race-around condition in a JK flip-flop?

Options

  • A. When J and K are both LOW
  • B. When J and K are both HIGH and the clock pulse is too wide
  • C. When the clock is disconnected
  • D. When the output is permanently HIGH
  • E. None of the above

Correct Answer (Detailed Explanation is Below)

B. When J and K are both HIGH and the clock pulse is too wide

Detailed Explanation

Explanation: Race-around occurs in a level-triggered JK flip-flop when J = K = 1 and the clock pulse duration exceeds the propagation delay. The output toggles repeatedly during the same clock pulse. It can be avoided using a master-slave JK flip-flop or edge-triggered design.
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BPSC Tre 4.0 Digtial Electronics Quiz Practice Set 1

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